FPGA Hardware Implementation of Computationally Efficient DOA Estimation of Coherent Signals

DOA estimation of highly correlated or coherent signals involves some preprocessing steps to de-correlate the signals before DOA estimates are computed. This increases the computational complexity of the estimation algorithms further, rendering hardware implementation a challenging task. In this paper, we present the hardware implementation of a novel and computationally efficient DOA estimation algorithm for coherent sources based on applying forward/backward averaging to the signal space matrix to deal with the incident coherent signals. The proposed algorithm is implemented on a Xilinx FPGA using LabVIEW FPGA modules. Simulations results as well as FPGA resource utilization and computation speed are presented to validate the efficacy of the proposed method and the efficiency of hardware implementation.