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Optimal Wavelet Selection for DC Fault Detection in Multi-Terminal VSC-HVDC Grids: A Performance Comparison with HIL Validation

Sovis, Akash, JAYASOORIYA, Manilka, Iqbal, Muhammad Naveed, Daniel, Kamran, Raja, Hadi Ashraf, Qadar, Rana Arslan and Shabbir, Noman (2026) Optimal Wavelet Selection for DC Fault Detection in Multi-Terminal VSC-HVDC Grids: A Performance Comparison with HIL Validation. Applied Sciences, 16 (11). p. 5186. ISSN 2076-3417

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Official URL: https://doi.org/10.3390/app16115186

Abstract or description

Rapid and reliable DC fault detection is critical to the safe operation of Voltage Source Converter High Voltage Direct Current (VSC-HVDC) multi-terminal grids, where low system impedance causes fault currents to rise within milliseconds, demanding detection within 1 ms. Discrete Wavelet Transform (DWT) has emerged as a leading signal processing technique for this purpose. However, no comprehensive performance study exists comparing the principal mother wavelets Daubechies (db), Symlets (sym), and Coiflets (coif) across the key operational variables of noise environment, cable length, and grid topology. This paper presents a systematic comparative evaluation of six wavelets (db4, db8, sym3, sym5, coif3, coif5) for DC fault detection in both three-terminal and four-terminal VSC-HVDC grids, assessing performance against four metrics: detection delay, accuracy, noise tolerance, and computational efficiency. Internal close-up and internal remote DC faults were simulated under no-noise conditions and white Gaussian noise levels of 30 dB, 20 dB, and 10 dB, with additional tests at cable lengths of 50 km and 400 km. Results demonstrate that db4 consistently achieves the lowest detection delay with high accuracy for four-terminal configurations under varying noise conditions, while sym3 proves most adaptable across both topologies for multiple cable lengths owing to its consistent detection delay. Real-time validation using an OPAL-RT hardware-in-the-loop (HIL) platform confirms the simulation findings, reinforcing the suitability of sym3 for multi-terminal grid deployment. These results provide actionable guidance for the selection of mother wavelets in DWT-based protection algorithms for modern VSC-HVDC systems.

Item Type: Article
Uncontrolled Keywords: HVDC fault detection; wavelet comparison; hardware-in-the-loop validation
Faculty: School of Digital, Technologies and Arts > Engineering
Depositing User: Manilka JAYASOORIYA
Date Deposited: 29 Jun 2026 09:19
Last Modified: 29 Jun 2026 09:19
URI: https://eprints.staffs.ac.uk/id/eprint/9685

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